Semifore and Breker Partner to Deliver Seamless, Automated Portable Stimulus Flow
Integrated solution links register definition with design and verification
SAN JOSE, CALIF. — May 23, 2016 — Semifore, Inc., the leading developer of tools for the automation of the implementation of the hardware-software interface for ASIC, SoC and FPGA-based designs, and Breker Verification Systems, Inc., the System-on-Chip (SoC) Verification Company, today announced an integration of their solutions for SoC design and verification engineers. Immediately available, the integration allows easy, flexible design and specification of SoC control registers and automatic generation of portable stimulus and tests to verify the register implementation.
Semifore’s CSRCompiler™ is the industry’s most advanced and highly configurable hardware-software interface implementation tool designed to eliminate the gap between hardware design, software development and verification. The cornerstone of the CoStar (Configuration Status Register) Design Director™ platform, CSRCompiler generates a high quality RTL implementation; significantly enhances the verification team’s performance by generating, from a single source, the register class instances based on the UVM register abstraction class library, including backdoor paths; and generates the necessary software header files for the software/firmware development team. With this new integration, CSRCompiler also generates a graph-based scenario model of the registers for import into the Breker solution.
Breker’s Trek family of products and apps automatically generates multi-threaded test cases that verify SoC designs more quickly and more thoroughly. These test cases are reusable from IP to full-chip level and from simulation to silicon, meeting all requirements for the upcoming Accellera standard on Portable Stimulus. When the register scenario model generated by CSRCompiler is imported, portable stimulus can be generated to verify the registers in simulation, emulation, FPGA prototypes, or silicon. Current Breker users who specify their registers using the IP-XACT standard can import this definition into CSRCompiler directly or enhance it to the Semifore CSRSpec format to take advantage of more CSRCompiler features.
“This new integration provides a single flow for the design and verification of a complete SoC, starting with its architecturally defined registers,” said Richard Weber, CEO of Semifore. “This satisfies our customers’ request for a link between our advanced register specifications and their SoC verification process.”
“Many of our customers have been frustrated by the limitations of IP-XACT for the specification of their control registers,” stated Adnan Hamid, CEO of Breker. “With the advanced capabilities included in the CoStar Design Director platform, specifically the CSRSpec language and CSRCompiler, customers can now automatically generate test cases for the registers as the first step in SoC verification.”
“It is great for the semiconductor industry when two EDA vendors link their solutions for the benefit of their customers,” said Jim Hogan, managing partner of Vista Ventures. “This announcement provides a unified solution that will be eagerly welcomed by SoC designers and verification teams.”
Availability and Pricing
The new, integrated solution is available today. Pricing is available upon request.
About Semifore, Inc.
Founded in 2006, Semifore, Inc. is the leading developer of products for the specification and implementation of the hardware-software interface for ASIC, SoC and FPGA-based designs. The company’s CoStar (Configuration Status Register) Design Director™ significantly improves designer productivity and interoperability efficiency as much as 70%. The platform encompasses three innovations: CSRCompiler™, the CSRSpec™ Language and CSRConfigurator™. The cornerstone of the platform, CSRCompiler is extremely fast, with the ability to compile thousands of registers in seconds. Advantages include abilities to produce accurate, concise design descriptions; to lint and integrate clean third-party intellectual property and legacy designs; to generate fast, single source high quality RTL; and to instantly document revisions for each functional team. CoStar Design Director is easily integrated into internal design flows and commercial tools, and supports industry standards to include IP-XACT, SystemRDL and UVM.
About Breker Verification Systems
Electronic Design Automation (EDA) software company Breker Verification Systems (www.brekersystems.com) provides innovative solutions to solve the challenge of complex system-on-chip (SoC) functional verification. Its Trek family of software and applications and its unique SoC scenario-modeling approach are used in production at leading semiconductor companies in the U.S., Europe and Asia. Founded in 2003, Breker is privately held and funded. Daily updates on company activities are available at twitter.com/BrekerSystems. “The Breker Trekker” blog is hosted on EDACafe, available at www10.edacafe.com/blogs/thebrekertrekker. Corporate headquarters: 1879 Lundy Ave., Suite 126, San Jose, Calif. 95131. Telephone: (650) 336-8872. Email: email@example.com. Website: www.brekersystems.com.
Semifore, CoStar, CoStar Design Director, CSRCompiler, CSRSpec, and the Semifore logo are trademarks of Semifore, Inc. All other trademarks are the property of their respective owners.
Trek, TrekUVM, TrekSoC, TrekSoC-Si, TrekApp, TrekBox and SoC Scenario Modeling are registered trademark of Breker Verification System, Inc. Breker Verification Systems acknowledges trademarks or registered trademarks of other organizations for their respective products.