Let’s face it. In the design world of today, chips are denser, schedules are tighter and designer productivity is the name of the game. TTM and ROI mean NIL if you don’t deliver the RTL. But how do you get there with more than a thousand control and status registers – in some cases two or three orders of magnitude more – on a single chip?

If you have a small number of registers, you could probably use a GUI or spreadsheet. But when the numbers start going up, you start looking for better ways of interacting with that data. You start exploring text-based input formats and high-level features like types and templates to generate a lot of information quickly and accurately.

That’s when you decide you need to turn the knob to 11 and find a new way. And the reason Semifore developed CSRSpec™, a domain-specific language for register map specification. CSRSpec provides a single source to generate RTL. It promotes scalability and legacy data reuse, and it natively interfaces with industry standards.

Customers use CSRSpec types and templates to write compact code that generates large numbers of registers. These templates can be reused and instantiated in multiple places to ensure consistent specifications for the same register types.  It also minimizes what has to be updated as the chip specification evolves.

Customers rely on CSRSpec templates and types to provide common header files to the entire organization, from the start of the design through completion. RTL designers can all work from the same file set, and in doing so, present a consistent interface to the software team. All of the control registers work the same way. Communication is automatic, putting everyone on the same page with data structures commonly defined throughout the whole design.

CSRSpec templates can be used across the entire design and verification team. A typical process starts with a designer defining a common CSRSpec header file. That file is then extended by each member of the team to create their own specific header file targeted for their application.  This process enables consistent structures in UVM RAL class definitions for the verification team and C header files for the software team.

In fact, designers working with us have built 

[CSRSPEC] libraries with numerous field types, freeing them to have a configuration bit that works in a certain way, a status bit that works in a certain way, and an interrupt bit that works in a certain way. Either they create templates around the field types and put those in the header file, or they have templates for a certain kind of register like a single interrupt register or a group of interrupt registers. Often they will define groups of registers: enable control, address, and counter. This means that all the RTL designer needs to do is instantiate a template with a couple of parameters, making it very easy to generate a lot of registers that are defined consistently.

We’ve come a long way from the days of GUIs and tedious design. Designers are no longer forced to enter one register at a time with few options. And that is why we at Semifore proudly say: Power to the Designer!