Created by Semifore, the CSRSpec™ language provides a single source to specify all aspects of the hardware/software interface, including register behavior and address map hierarchy. A defacto standard among many customers, it is a terse and easy to understand language. It includes over 200 unique properties and 6,000 register behavior combinations. When compiled, the language expands to full implementation, high quality RTL ready for synthesis. CSRSpec also provides unique, highly configurable parameterized templates to promote design reuse and consistency between teams.

CSRSpec creates an executable specification of your design.

  • Easy to understand language implements superior synthesizable RTL
  • A single data source to generates RTL, firmware headers, verification class instances, and documentation outputs
  • Promotes repeatability, scalability and legacy data reuse
  • Natively interfaces with industry standards and those not currently available (bus, memory, wide data paths)

Semifore CSRSpec RTL Designer Flow

Doing What Other Languages Can’t

There are several industry formats available to capture the structure and intent of the hardware/software interface. While helpful, all these formats do not deliver the required robustness and completeness to be used as an executable specification.

This is why Semifore developed the CSRSpec language.

Here is one specific example of a design practice that can only be represented by CSRSpec:

Ordinarily, the size of a register/memory is the same as the size of the bus that accesses it (i.e., for read and write operations). However, there are times when the designer prefers a WIDE regist