The Semifore Methodology
The CSRCompiler™ system and the CSRSpec™ language form a scalable and robust methodology to automate all aspects of hardware/software interface (HSI) design, verification, firmware, and documentation.
The “CSR” in our names comes from the acronym for configuration and status registers, fundamental parts of the hardware/software interface.
Semifore’s methodology provides multi-language support without the need for specialized interfaces or additional scripting. In response to customer requests, we continue to provide functionality not available in UVM, IP-XACT, and SystemRDL. Our approach incorporates an agile design process to ensure best practices and early engagement by the entire design team.
CSRCompiler identifies IP integrity issues to ensure clean import of third-party IP or internal legacy data. It performs a strict lexical analysis, parse tree evaluation, and semantic check of third-party files. The semantic checking extends beyond standards to ensure the address map is self-consistent and will allow the generation of valid RTL.
Solving Register Map Complexity
System design complexity has reached tens of thousands of configuration and status registers – in some cases two or three orders of magnitude more – on a single chip. With these thousands of registers have come substantial design challenges, with productivity and design integrity at the forefront. The Semifore methodology works at the register behavior level of abstraction, in the architectural design phase, to solve these problems. You specify design intent via our CSRSpec language, and the design is implemented in a flexible register address map hierarchy. We provide an intuitive management system that processes the register specification, or map of the design. These register maps are the behavioral foundation for the design that ultimately define its functionality, performance and behavior.
The Semifore methodology automatically documents changes across entire functional teams, ensuring a reliable, up-to-date specification is always being used. We provide a single-source specification for register and memory-map information, fully configured for all teams in the formats and views they require. All teams – functionally diverse and geographically separate – remain perfectly synchronized, collaborative and productive.
Single Source Methodology
Our methodology is unique in that all aspects of the design originate from a single source. CSRCompiler generates synthesizable RTL at the push of a button. CSRCompiler enables very fast iteration with updated documentation across design teams while ensuring all information is correct. It is extremely flexible and allows multiple input formats to be linked to create the single source, and it provides customized output for the individual needs of the entire design team.